Jens Sparsø

Jens Sparsø

Professor

DTU COMPUTE
Department of Applied Mathematics and Computer Science

Technical University of Denmark

Richard Petersens Plads

Building 322, room 127

2800 Kgs. Lyngby

Ph.
Fax +45 45 93 00 74
E-mail jspa@dtu.dk
ORCID 0000-0002-0961-9438
Home page

Request a vCard via e-mail.

Publications
Projects
Courses
CV
Loading

Publications rss feed

2018
  PDF

A multicore processor for time-critical applications

Schoeberl, Martin ; Pezzarossa, Luca ; Sparsø, Jens
in: I E E E Design & Test, vol: 35, issue: 2, pages: 38-47

Type: Journal article (Peer reviewed)

Status: Published     |    Year: 2018     |    DOI: https://doi.org/10.1109/MDAT.2018.2791809

 

Selected papers from the 2nd IEEEE Nordic Circuits and Systems Conference (NorCAS), 2016.

Sparsø, Jens
in: Microprocessors and Microsystems, vol: 60, pages: 38-39, 2011
Presented at:
Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

Type: Editorial (Peer reviewed)

Status: Published     |    Year: 2018     |    DOI: https://doi.org/10.1016/j.micpro.2018.03.008

 

Using dynamic partial reconfiguration of FPGAs in real-Time systems

Pezzarossa, Luca ; Kristensen, Andreas Toftegaard ; Schoeberl, Martin ; Sparsø, Jens
in: Microprocessors and Microsystems, vol: 61, pages: 198-206, 2011

Type: Journal article (Peer reviewed)

Status: Published     |    Year: 2018     |    DOI: https://doi.org/10.1016/j.micpro.2018.05.017

2017
 

A Controller for Dynamic Partial Reconfiguration in FPGA-Based Real-Time Systems

Pezzarossa, Luca ; Schoeberl, Martin ; Sparsø, Jens
part of: 2017 IEEE 20th International Symposium on Real-Time Distributed Computing, pages: 92-100, 2017, IEEE
Presented at:
2017 IEEE 20th International Symposium on Real-Time Distributed Computing

Type: Article in proceedings (Peer reviewed)

Status: Published     |    Year: 2017     |    DOI: https://doi.org/10.1109/ISORC.2017.3

  PDF

A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip

Sørensen, Rasmus Bo ; Pezzarossa, Luca ; Schoeberl, Martin ; Sparsø, Jens
in: Journal of Systems Architecture, vol: 74, pages: 1–13, 2011

Type: Journal article (Peer reviewed)

Status: Published     |    Year: 2017     |    DOI: https://doi.org/10.1016/j.sysarc.2017.02.001

  PDF

Can Real-Time Systems Benefit from Dynamic Partial Reconfiguration?

Pezzarossa, Luca ; Kristensen, Andreas Toftegaard ; Schoeberl, Martin ; Sparsø, Jens
part of: Proceedings of the IEEE NorCAS 2017, 2017, IEEE
Presented at:
Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

Type: Article in proceedings (Peer reviewed)

Status: Published     |    Year: 2017     |    DOI: https://doi.org/10.1109/NORCHIP.2017.8124984

  PDF

High-level synthesis for reduction of WCET in real-time systems

Kristensen, Andreas Toftegaard ; Pezzarossa, Luca ; Sparsø, Jens
part of: Proceedings of the 2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), pages: 1-6, 2017, IEEE
Presented at:
Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

Type: Article in proceedings (Peer reviewed)

Status: Published     |    Year: 2017     |    DOI: https://doi.org/10.1109/NORCHIP.2017.8124945

 

Timing organization of a real-time multicore processor

Schoeberl, Martin ; Sparsø, Jens
part of: 2017 New Generation of CAS, pages: 89-92, 2017, IEEE
Presented at:
2017 New Generation of CAS

Type: Article in proceedings (Peer reviewed)

Status: Published     |    Year: 2017     |    DOI: https://doi.org/10.1109/NGCAS.2017.73

2016
 

An Area-Efficient TDM NoC Supporting Reconfiguration for Mode Changes

Sørensen, Rasmus Bo ; Pezzarossa, Luca ; Sparsø, Jens
part of: Proceedings of the 10th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2016), 2016, IEEE
Presented at:
10th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2016)

Type: Article in proceedings (Peer reviewed)

Status: Published     |    Year: 2016     |    DOI: https://doi.org/10.1109/NOCS.2016.7579324

 

Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation

Kasapaki, Evangelia ; Schoeberl, Martin ; Sørensen, Rasmus Bo ; Müller, Christoph ; Goossens, Kees ; Sparsø, Jens
in: I E E E Transactions on Very Large Scale Integration (VLSI) Systems, vol: 24, issue: 2, pages: 479-492, 2011

Type: Journal article (Peer reviewed)

Status: Published     |    Year: 2016     |    DOI: https://doi.org/10.1109/TVLSI.2015.2405614